A CDMA receiver employing a direct sequence CDMA communication scheme is equipped with a path searcher for seeking a despread timing. The path searcher is in turn equipped with a matched filter or a sliding correlator. In the case where the matched filter is provided, the matched filter is provided with a delay device, a multiplier, and an adder.
As a sampling frequency used for sampling a received signal becomes higher, a despread timing (i.e., a path timing) can be detected with high accuracy. However, if oversampling is effected for increasing a sampling frequency, the matched filter will require delay devices which are equal in number to a multiple of an oversampling ratio.
To solve this problem, a CDMA receiver described in Japanese Patent Application Laid-Open No. 82973/2000 is provided with first and second circuit sections. The first circuit section is constituted of a matched filter for allowing input of a signal received through low-speed oversampling, and is used for detecting a coarse despread timing. The second circuit section is equipped with an integrator and a matched filter. On the basis of the coarse despread timing detected by the first circuit section, a highly accurate despread timing is determined through high-speed oversampling.
However, in the CDMA receiver described in Japanese Patent Application Laid-Open No. 82973/2000, the second circuit section performs processing after the first circuit section has performed processing. Path search processing involves consumption of time; consequently, there arises a problem of overall despread processing consuming a considerable amount of time. Although the first circuit section can be made compact, a necessity for use of the second circuit section arises. On the whole, not much reduction in the size of circuitry is achieved.
The invention aims at providing a CDMA receiver which can render compact a circuit including a matched filter and diminish load stemming from despread process.